Huawei's top semiconductor scientist has delivered an unusually blunt warning to the Western chip industry. In a rare four-hour interview reported by Bloomberg on August 4, Liao Heng, chief scientist of Huawei's semiconductor unit, argued that Nvidia, TSMC and Intel are heading for an 'avalanche' once transistor shrinkage stalls.
His diagnosis: the industry has leaned so heavily on ever-smaller transistors that it has no plan for the end of that road. Huawei's answer is to stop shrinking and start stacking — the Tau Scaling Law and LogicFolding 3D architecture he champions achieve density through vertical chip layering rather than ever-finer fabrication. Liao Heng targets transistor density equivalent to 14 Ångström by 2031, with the first commercial test landing in an upcoming smartphone chip.
The message arrives at a politically charged moment. Huawei remains cut off from advanced lithography tools by US sanctions, and a Chinese company warning the West about physical limits could be dismissed as propaganda. But industry experts note the limits Liao Heng describes are real: each new process node delivers diminishing gains at soaring cost.
Whether Huawei's 3D approach can actually close the gap will only be proven in practice. Analysts are split between seeing the architecture as a genuine alternative or a clever way around sanctions. What is certain is that the debate over the end of Moore's law is no longer academic — it is playing out on the battlefield of global chip politics.
